RTL Logic Design Engineer - major announcement soon

  • Santa Clara, CA
  • Full-time

Company Description

 We have working silicon in our lab improving CPU performance through breakthrough architectural innovations.


                  “Innovation distinguishes between a leader and a follower.”  Steve Jobs

 

SMI is a start-up currently in stealth-mode announcements coming soon.

 

We are developing a revolutionary new processor that improves performance through architectural innovations.

 

Our silicon is working in the lab; this disruptive technology will bend the view of the well-established idea of what is possible in CPU performance. 

Job Description


We are driven to meet the challenge to deliver a NEW microprocessor to meet then needs in mobile computing


This is a disruptive technological advancement that our team is committed to achieving by staying true to our corporate mission and  values.

 

As a senior member (or technical lead) of the team developing a cutting edge micro-processor, you will be at the front end of this new product development cycle and your inputs will include micro-architecture specification and logic design for a high-performance, low-power CPU core.

 

Specifics about the role:

 

As the CPU Micro Architect and RTL engineer you will own: Microarchitecture definition, development and specification.

  • Starting with NEW high-level architectural model, through micro-architectural research and arriving at a detailed specification.
  • As RTL Engineer you will own development, assessment and refinement of RTL design to target power, performance, area and timing goals.
  • Validation - Support testbench development and simulation for functional and performance verification. Performance exploration and correlation
  • Explore high performance strategies and validate that the RTL design meets targeted performance.
  • Work with design team members across disciplines (Logic, Circuits, PD, DFT) to implement and validate physical design on the aspects of timing, area, reliability, testability and power.

Qualifications

This role calls for 10+ years of CPU  Microarchitecture and RTL  design experience.

 

Thorough knowledge of microprocessor architecture (ARM|x86|SPARC|MIPS) including expertise in one (1) or more of the following areas:

 

SOC/GPU/CPU/NPU

-          Coherency

-          Cache (Data, Instruction Cache, L2, L3)

CPU

-          Out-of-order processor design (Scheduler, Load Store Unit/Load Store Queue, Instruction fetch,      Branch predictor)

Execution Unit Design: Floating Point Unit (FPU) or Integer arithmetic (ALU)

Memory Management Unit (MMU)) & Memory subsystems

 

  • Knowledge of logic design principles along with timing and power implications.
  • Expert in low power microarchitecture techniques.
  • Expert in high performance techniques and trade-offs in a CPU microarchitecture.
  • Familiarity with industry standard EDA tools, methodologies and techniques
  • Good verification background is a plus.
  • Experienced RTL coder in Verilog

 

  • Knowledge of logic design principles along with timing and power implications.
  • Expert in low power microarchitecture techniques.
  • Expert in high performance techniques and trade-offs in a CPU microarchitecture.
  • Familiarity with industry standard EDA tools, methodologies and techniques
  • Good verification background is a plus.
  • Experienced RTL coder in Verilog

Additional Information

This is a very exciting time for our company.

 

We are now forming new teams for new products as the growth has been rapid, and as  start-up company currently in stealth mode, were are up to 250+ employees! 

 

While focusing on the development of NEW CPU and SoC platforms, we are not pushing the bleeding edge of technology., we are achievng result sin a new way.


Our close collaboration with various partners and customers is growing.

 

Our company is funded from the solid financial backing from large corporate, strategic and financial investors.

 

Our company is founded by an experienced team with many industry notables involved in various capacities.